High-speed PCB design and HDI technology
Microvia structures, dense fine-pitch escape routing and the layer transitions that high-speed interfaces depend on.
HDI PCB design training
Design boards that run at LPDDR5 and PCIe Gen5 speeds.
Practical, industry-focused training in HDI and high-speed PCB layout, with signal and power integrity built into every step from schematic to Gerber.
Up to 56layers of multilayer stack-up design
LPDDR4, 5, 6memory interface layouts
PCIe Gen4, 5, 6lane routing and signal integrity
PAM2 and PAM4signaling considerations at layout level
Core competencies
What you will learn to do
Each topic is taught on real design workflows, so the theory shows up where it affects the board.
LPDDR4, LPDDR5 and LPDDR6 layouts
Placement, byte-lane routing, length matching and reference planes for each memory generation.
PCIe Gen4, Gen5 and Gen6 routing
Lane routing, via transitions and loss considerations as data rates climb from one generation to the next.
PAM2 (NRZ) and PAM4 signaling
What the move from two voltage levels to four changes for routing, margins and layout choices.
Layout-driven signal and power integrity
Return paths, decoupling placement, plane shapes and power delivery treated as part of the layout, not an afterthought.
Multilayer stack-up design
Planning layer count, materials and impedance control for boards of up to 56 layers.
Constraint-driven PCB layout
Turning interface requirements into constraints first, then routing to them with confidence.
Manufacturing compliance
Guidelines for fabrication, assembly and test, so the design is ready to build and ready to check.
Mentoring and PCB design training
Guidance that connects theory to real product development and builds problem-solving skill.
The complete design workflow
From schematic to Gerber, in order.
Training follows the same sequence a board follows in a real project.
- 1
Schematic interpretation
Read the design intent, interface groups and critical nets before placing a single component.
- 2
Stack-up and placement
Choose layers and dielectrics, then place components around the BGA escape and the interface routes.
- 3
Constraint-driven layout
Set impedance, length and spacing rules, then route to them.
- 4
SI and PI considerations
Check return paths, decoupling and power delivery while the layout is still easy to change.
- 5
DFM, DFA and Valor-NPI checks
Catch fabrication and assembly issues before the design is released.
- 6
Fabrication documents and Gerber readiness
Prepare the drawings, notes and outputs a fabricator can build from.
Who it is for
Built for people who design boards.
Working engineers
Hardware and PCB engineers who want to improve design quality and productivity on advanced, high-speed and HDI boards.
Students
Students who want to build PCB design skills on industry-style workflows and be ready for real product development.
Your mentor
HDI PCB design mentor and trainer.
Expertise in high-speed PCB design, with a focus on LPDDR4, LPDDR5 and LPDDR6 memory, PCIe Gen4, Gen5 and Gen6, and PAM2 (NRZ) and PAM4 signaling.
Experience in complex multilayer PCB development of up to 56 layers, including HDI design, stack-up planning, component placement, high-speed routing, PDN optimization, signal integrity and manufacturability best practices.
The goal of every session is to bridge the gap between theory and real-world product development, helping engineers and students raise their design quality, productivity and technical excellence.
Talk about training.
Email us what you want to learn and we will get back to you with how the training can fit.
auroraspl.training@gmail.com
In your email, mention the topics you want to learn, such as LPDDR5 routing, PCIe Gen5 stack-up or HDI escape routing, and whether you are a student or a working engineer.